? semiconductor components industries, llc, 2008 november, 2008 ? rev. 8 1 publication order number: mc100el14/d mc100el14 5v ecl 1:5 clock distribution chip the mc100el14 is a low skew 1:5 clock distribution chip designed explicitly for low skew clock distribution applications. the v bb pin, an internally generated voltage supply, is available to this device only. for single-ended input conditions, the unused differential input is connected to v bb as a switching reference voltage. v bb may also rebias ac coupled inputs. when used, decouple v bb and v cc via a 0.01 f capacitor and limit current sourcing or sinking to 0.5 ma. when not used, v bb should be left open. the el14 features a multiplexed clock input to allow for the distribution of a lower speed scan or test clock along with the high speed system clock. when low (or left open and pulled low by the input pulldown resistor) the sel pin will select the differential clock input. the common enable (en ) is synchronous so that the outputs will only be enabled/disabled when they ar e already in the low state. this avoids any chance of generating a r unt clock pulse when the device is enabled/disabled as can happen with an asynchronous control. the internal flip flop is clocked on the falling edge of the input clock, therefore all associated specificatio n limits are referenced to the negative edge of the clock input. features ? 50 ps output-to-output skew ? synchronous enable/disable ? multiplexed clock input ? the 100 series contains temperature compensation ? pecl mode operating range: v cc = 4.2 v to 5.7 v with v ee = 0 v ? necl mode operating range: v cc = 0 v with v ee = ? 4.2 v to ? 5.7 v ? q output will default low with inputs open or at v ee ? internal input pull ? down resistors on all inputs, pull ? up resistors on inverted inputs soic ? 20l dw suffix case 751d marking diagram http://onsemi.com a = assembly location wl = wafer lot yy = year ww = work week g = pb ? free package 20 1 100el14 awlyywwg *for additional marking information, refer to application note and8002/d. see detailed ordering and shipping information in the package dimensions sect ion on page 7 of this data sheet. ordering information
mc100el14 http://onsemi.com 2 ? pb ? free packages are available* *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d.
mc100el14 http://onsemi.com 3 figure 1. logic diagram and pinout assignment q1 q2 q3 q4 17 18 16 15 14 13 12 4 3 5678 9 v cc 11 10 q4 q3 q2 q1 nc sclk clk clk v bb sel v ee d q 1 0 q0 19 20 2 1 v cc q0 en * all v cc pins are tied together on the die. warning: all v cc and v ee pins must be externally connected to power supply to guarantee proper operation. table 1. pin description pin function clk, clk ecl diff clock inputs sclk ecl scan clock input en ecl sync enable sel ecl clock select input q 0 ? 4, q 0 ? 4 ecl diff clock outputs v bb reference voltage output v cc positive supply v ee negative supply nc no connect table 2. function table clk* sclk* sel* en * q l h x x x x x l h x l l h h x l l l l h l h l h l (note ) 1. on next negative transition of clk or sclk **pins will default low when left open. table 3. attributes characteristics value internal input pulldown resistor 75 k internal input pullup resistor 75 k esd protection human body model machine model charge device model > 2 kv > 200 v > 4 kv moisture sensitivity (note 2) pb pb ? free level 1 level 3 flammability rating oxygen index: 28 to 34 ul 94 v ? 0 @ 0.125 in transistor count 303 devices meets or exceeds jedec spec eia/jesd78 ic latchup test 2. for additional moisture sensitivity information, refer to application note and8003/d.
mc100el14 http://onsemi.com 4 table 4. maximum ratings symbol parameter condition 1 condition 2 rating unit v cc pecl mode power supply v ee = 0 v 8 v v ee necl mode power supply v cc = 0 v ? 8 v v i pecl mode input voltage necl mode input voltage v ee = 0 v v cc = 0 v v i v cc v i v ee 6 ? 6 v v i out output current continuous surge 50 100 ma ma i bb v bb sink/source 0.5 ma t a operating temperature range ? 40 to +85 c t stg storage temperature range ? 65 to +150 c ja thermal resistance (junction ? to ? ambient) 0 lfpm 500 lfpm soic ? 20l soic ? 20l 90 60 c/w c/w jc thermal resistance (junction ? to ? case) standard board soic ? 20l 30 to 35 c/w t sol wave solder pb pb ? free <2 to 3 sec @ 248 c <2 to 3 sec @ 260 c 265 265 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability.
mc100el14 http://onsemi.com 5 table 5. 100el series pecl dc characteristics v cc = 5.0 v; v ee = 0.0 v (note 3) symbol characteristic ? 40 c 25 c 85 c unit min typ max min typ max min typ max i ee power supply current 32 40 32 40 34 42 ma v oh output high voltage (note 4) 3915 3995 4120 3975 4045 4120 3975 4050 4120 mv v ol output low voltage (note 4) 3170 3305 3445 3190 3295 3380 3190 3295 3380 mv v ih input high voltage (single ? ended) 3835 4120 3835 4120 3835 4120 mv v il input low voltage (single ? ended) 3190 3525 3190 3525 3190 3525 mv v bb output voltage reference 3.62 3.74 3.62 3.74 3.62 3.74 v v ihcmr common mode range (differential configuration) (note 5) v pp < 500 mv v pp 500 mv 1.3 1.5 4.6 4.6 1.2 1.4 4.6 4.6 1.2 1.4 4.6 4.6 v i ih input high current 150 150 150 a i il input low current 0.5 0.5 0.5 a note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 3. input and output parameters vary 1:1 with v cc .v ee can vary +0.8 v / ? 0.5 v. 4. outputs are terminated through a 50 resistor to v cc ? 2.0 v. 5. v ihcmr min varies 1:1 with v ee , v ihcmr max varies 1:1 with v cc .the v ihcmr range is referenced to the most positive side of the differential input signal. normal operation is obtained if the high level falls within the specified range and the peak ? to ? peak voltage lies between v pp (min) and 1 v. table 6. 100el series necl dc characteristics v cc = 0.0 v; v ee = ? 5.0 v (note 6) symbol characteristic ? 40 c 25 c 85 c unit min typ max min typ max min typ max i ee power supply current 32 40 32 40 34 42 ma v oh output high voltage (note 7) ? 1085 ? 1005 ? 880 ? 1025 ? 955 ? 880 ? 1025 ? 955 ? 880 mv v ol output low voltage (note 7) ? 1830 ? 1695 ? 1555 ? 1810 ? 1705 ? 1620 ? 1810 ? 1705 ? 1620 mv v ih input high voltage (single ? ended) ? 1165 ? 880 ? 1165 ? 880 ? 1165 ? 880 mv v il input low voltage (single ? ended) ? 1810 ? 1475 ? 1810 ? 1475 ? 1810 ? 1475 mv v bb output voltage reference ? 1.38 ? 1.26 ? 1.38 ? 1.26 ? 1.38 ? 1.26 v v ihcmr common mode range (differential configuration) (note 8) v pp < 500 mv v pp 500 mv ? 3.7 ? 3.5 ? 0.4 ? 0.4 ? 3.8 ? 3.6 ? 0.4 ? 0.4 ? 3.8 ? 3.6 ? 0.4 ? 0.4 v i ih input high current 150 150 150 a i il input low current 0.5 0.5 0.5 a note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 6. input and output parameters vary 1:1 with v cc .v ee can vary +0.8 v / ? 0.5 v. 7. outputs are terminated through a 50 resistor to v cc ? 2.0 v. 8. v ihcmr min varies 1:1 with v ee , v ihcmr max varies 1:1 with v cc .the v ihcmr range is referenced to the most positive side of the differential input signal. normal operation is obtained if the high level falls within the specified range and the peak ? to ? peak voltage lies between v pp (min)and 1 v.
mc100el14 http://onsemi.com 6 table 7. ac characteristics v cc = 5.0 v; v ee = 0.0 v or v cc = 0.0 v; v ee = ? 5.0 v (note 9) symbol characteristic ? 40 c 25 c 85 c unit min typ max min typ max min typ max f max maximum toggle frequency (see figure 2, f max /jitter) 1 1 1 ghz t plh t phl prop clk to q (diff) delay clk to q (se) sclk to q 520 470 470 720 770 770 580 530 530 680 680 680 780 830 830 630 580 580 830 880 880 ps t skew part-to-part skew within-device skew (note 10) 200 50 200 50 200 50 ps t jitter random clock jitter (rms) @ 1 ghz (see figure 2, f max /jitter) 1 1 1 ps t s setup time en 0 0 ? 133 0 ps t h hold time en 250 250 140 250 ps v pp input swing (note 11) 150 1000 150 1000 150 1000 mv t r t f output rise/fall times q (20% ? 80%) 230 500 230 500 230 500 ps note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 9. v ee can vary +0.8 v / ? 0.5 v. outputs are terminated through a 50 resistor to v cc ? 2.0 v. 10. skews are specified for identical low-to-high or high-to-low transitions. 11. v pp (min) is the minimum input swing for which ac parameters guaranteed. the device has a dc gain of 40. figure 2. output voltage amplitude / rms jitter vs. input frequency at ambient temperature (typical) f in (mhz) 0.5 1.0 1.5 2.0 vo utpp (mv) jitter out ps (rms) 0 200 300 400 500 600 700 800 200 400 600 800 1000 1200 1400 jitter v outpp
mc100el14 http://onsemi.com 7 figure 3. typical termination for output driver and device evaluation (see application note and8020/d ? termination of ecl logic devices.) driver device receiver device qd q d z o = 50 z o = 50 50 50 v tt v tt = v cc ? 2.0 v ordering information4 device package shipping ? mc100el14dw soic ? 20l 38 units / rail mc100el14dwg soic ? 20l (pb ? free) 38 units / rail MC100EL14DWR2 soic ? 20l 1000 / tape & reel MC100EL14DWR2g soic ? 20l (pb ? free) 1000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
mc100el14 http://onsemi.com 8 resource reference of application notes an1405/d ? ecl clock distribution techniques an1406/d ? designing with pecl (ecl at +5.0 v) an1503/d ? eclinps i/o spice modeling kit an1504/d ? metastability and the eclinps family an1568/d ? interfacing between lvds and ecl an1672/d ? the ecl translator guide and8001/d ? odd number counters design and8002/d ? marking and date codes and8020/d ? termination of ecl logic devices and8066/d ? interfacing with eclinps and8090/d ? ac characteristics of ecl devices
mc100el14 http://onsemi.com 9 package dimensions 20 1 11 10 b 20x h 10x c l 18x a1 a seating plane h x 45 e d m 0.25 m b m 0.25 s a s b t e t b a dim min max millimeters a 2.35 2.65 a1 0.10 0.25 b 0.35 0.49 c 0.23 0.32 d 12.65 12.95 e 7.40 7.60 e 1.27 bsc h 10.05 10.55 h 0.25 0.75 l 0.50 0.90 0 7 notes: 1. dimensions are in millimeters. 2. interpret dimensions and tolerances per asme y14.5m, 1994. 3. dimensions d and e do not include mold protrusion. 4. maximum mold protrusion 0.15 per side. 5. dimension b does not include dambar protrusion. allowable protrusion shall be 0.13 total in excess of b dimension at maximum material condition. so ? 20 wb case 751d ? 05 issue g on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. sc illc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems in tended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hol d scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising ou t of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding th e design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resa le in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 mc100el14/d eclinps is a trademark of semiconductor components industries, llc (scillc). literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loca l sales representative
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